1. Field of the Invention
The present invention relates to a package for a semiconductor device, and more particularly, to a package for a semiconductor device that does not require a molded body.
2. Description of the Prior Art
Semiconductor devices, especially MOSFET devices, generally desire very low package resistance (RDSon) with good thermal performance. It is also generally desirable to have simple, quick and efficient methods of packaging semiconductor devices. Thus, numerous packaging concepts and methods have been developed in the prior art.
An example of one such packaging concept involves a ball grid array (BGA). Such a concept involves an array of source, gate and drain solder balls that are connected directly to the printed circuit board (PCB). This requires a bumped die and a leadframe is used to facilitate the drain contact. Another packaging concept is commonly referred to as Flip Chip in Leaded Molded Package (FLMP), which comprises a molded leaded surface mount package where a bumped die is connected to gate and source terminals of the frame. The drain, which is the back side of the die, is exposed from the mold compound or body and is connected to the PCB via solder reflow during a standard board mounting process. Other packaging concepts use copper straps and/or wire bond technology.
These prior art concepts involve various components and may result in complicated manufacturing (packaging) processes.